371 lines
10 KiB
C
371 lines
10 KiB
C
/*
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* code in this file derived from:
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* http://www.intel.com/cd/ids/developer/asmo-na/eng/technologies/20438.htm
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* license grants use of the source code.
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*/
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static unsigned int HTSupported(void);
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static unsigned char LogicalProcPerPhysicalProc(unsigned int);
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static unsigned char GetAPIC_ID(unsigned int);
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static unsigned char CPUCount(unsigned char *, unsigned char *);
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// EDX[28] Bit 28 is set if HT is supported
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#define HT_BIT 0x10000000
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// EAX[11:8] Bit 8-11 contains family processor ID.
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#define FAMILY_ID 0x0F00
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#define PENTIUM4_ID 0x0F00
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// EAX[23:20] Bit 20-23 contains extended family processor ID
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#define EXT_FAMILY_ID 0x0F00000
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// EBX[23:16] Bit 16-23 in ebx contains the number of logical
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// processors per physical processor when execute cpuid with
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// eax set to 1
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#define NUM_LOGICAL_BITS 0x00FF0000
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// EBX[31:24] Bits 24-31 (8 bits) return the 8-bit unique
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// initial APIC ID for the processor this code is running on.
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// Default value = 0xff if HT is not supported
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#define INITIAL_APIC_ID_BITS 0xFF000000
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// Status Flag
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#define HT_NOT_CAPABLE 0
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#define HT_ENABLED 1
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#define HT_DISABLED 2
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#define HT_SUPPORTED_NOT_ENABLED 3
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#define HT_CANNOT_DETECT 4
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#include "sigar.h"
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#include "sigar_private.h"
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#include "sigar_os.h"
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static unsigned int HTSupported(void)
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{
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unsigned int
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Regedx = 0,
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Regeax = 0,
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VendorId[3] = {0, 0, 0};
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__try {
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__asm {
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xor eax, eax // call cpuid with eax = 0
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cpuid // Get vendor id string
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mov VendorId, ebx
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mov VendorId + 4, edx
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mov VendorId + 8, ecx
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mov eax, 1 // call cpuid with eax = 1
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cpuid
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mov Regeax, eax // eax contains family processor type
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mov Regedx, edx // edx has info about the availability of hyper-Threading
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}
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}
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__except (EXCEPTION_EXECUTE_HANDLER) {
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return 0; // cpuid is unavailable
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}
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if (((Regeax & FAMILY_ID) == PENTIUM4_ID) ||
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(Regeax & EXT_FAMILY_ID))
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{
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if ((VendorId[0] == 'uneG') &&
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(VendorId[1] == 'Ieni') &&
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(VendorId[2] == 'letn'))
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{
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// Genuine Intel with hyper-Threading technology
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return Regedx & HT_BIT;
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}
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}
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return 0; // Not genuine Intel processor
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}
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static unsigned char LogicalProcPerPhysicalProc(unsigned int ht_supported)
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{
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unsigned int Regebx = 0;
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if (!ht_supported) {
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return (unsigned char) 1; // HT not supported
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}
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// Logical processor = 1
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__asm {
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mov eax, 1
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cpuid
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mov Regebx, ebx
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}
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return (unsigned char) ((Regebx & NUM_LOGICAL_BITS) >> 16);
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}
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static unsigned char GetAPIC_ID(unsigned int ht_supported)
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{
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unsigned int Regebx = 0;
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if (!ht_supported) {
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return (unsigned char) -1;
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}
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// Logical processor = 1
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__asm {
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mov eax, 1
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cpuid
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mov Regebx, ebx
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}
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return (unsigned char) ((Regebx & INITIAL_APIC_ID_BITS) >> 24);
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}
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static unsigned char CPUCount(unsigned char *LogicalNum,
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unsigned char *PhysicalNum)
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{
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unsigned int ht_supported = HTSupported();
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unsigned char StatusFlag = 0;
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SYSTEM_INFO info;
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*PhysicalNum = 0;
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*LogicalNum = 0;
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info.dwNumberOfProcessors = 0;
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GetSystemInfo(&info);
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// Number of physical processors in a non-Intel system
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// or in a 32-bit Intel system with Hyper-Threading technology disabled
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*PhysicalNum = (unsigned char) info.dwNumberOfProcessors;
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if (ht_supported) {
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unsigned char HT_Enabled = 0;
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*LogicalNum = LogicalProcPerPhysicalProc(ht_supported);
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if (*LogicalNum >= 1) { // >1 Doesn't mean HT is enabled in the BIOS
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HANDLE hCurrentProcessHandle;
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DWORD dwProcessAffinity;
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DWORD dwSystemAffinity;
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DWORD dwAffinityMask;
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// Calculate the appropriate shifts and mask based on the
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// number of logical processors.
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unsigned char i = 1,
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PHY_ID_MASK = 0xFF,
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PHY_ID_SHIFT = 0;
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while (i < *LogicalNum) {
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i *= 2;
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PHY_ID_MASK <<= 1;
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PHY_ID_SHIFT++;
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}
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hCurrentProcessHandle = GetCurrentProcess();
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GetProcessAffinityMask(hCurrentProcessHandle,
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&dwProcessAffinity,
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&dwSystemAffinity);
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// Check if available process affinity mask is equal to the
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// available system affinity mask
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if (dwProcessAffinity != dwSystemAffinity) {
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StatusFlag = HT_CANNOT_DETECT;
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// *PhysicalNum = (unsigned char)-1;
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return StatusFlag;
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}
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dwAffinityMask = 1;
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while (dwAffinityMask != 0 && dwAffinityMask <= dwProcessAffinity) {
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// Check if this CPU is available
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if (dwAffinityMask & dwProcessAffinity) {
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if (SetProcessAffinityMask(hCurrentProcessHandle,
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dwAffinityMask))
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{
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unsigned char APIC_ID,
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LOG_ID,
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PHY_ID;
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Sleep(0); // Give OS time to switch CPU
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APIC_ID = GetAPIC_ID(ht_supported);
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LOG_ID = APIC_ID & ~PHY_ID_MASK;
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PHY_ID = APIC_ID >> PHY_ID_SHIFT;
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if (LOG_ID != 0) {
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HT_Enabled = 1;
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}
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}
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}
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dwAffinityMask = dwAffinityMask << 1;
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}
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// Reset the processor affinity
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SetProcessAffinityMask(hCurrentProcessHandle, dwProcessAffinity);
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if (*LogicalNum == 1) { // Normal P4 : HT is disabled in hardware
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StatusFlag = HT_DISABLED;
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}
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else {
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if (HT_Enabled) {
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// Total physical processors in a Hyper-Threading enabled system.
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*PhysicalNum /= (*LogicalNum);
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StatusFlag = HT_ENABLED;
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}
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else {
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StatusFlag = HT_SUPPORTED_NOT_ENABLED;
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}
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}
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}
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}
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else {
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// Processors do not have Hyper-Threading technology
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StatusFlag = HT_NOT_CAPABLE;
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*LogicalNum = 1;
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}
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return StatusFlag;
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}
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unsigned int sigar_cpu_count(sigar_t *sigar)
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{
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unsigned char
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status,
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LogicalNum = 0,
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PhysicalNum = 0;
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if (sigar->ncpu != 0) {
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return sigar->ncpu;
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}
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status = CPUCount(&LogicalNum, &PhysicalNum);
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sigar->ncpu = (unsigned int)PhysicalNum;
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if (status == HT_ENABLED) {
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sigar->ht_enabled = 1;
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sigar->lcpu = LogicalNum;
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}
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else {
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sigar->ht_enabled = 0;
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sigar->lcpu = 0;
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}
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return sigar->ncpu;
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}
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/* this function is not part of the intel derived code */
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int sigar_cpu_info_get(sigar_t *sigar, sigar_cpu_info_t *info)
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{
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HKEY key, cpu;
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int i = 0;
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TCHAR id[MAX_PATH + 1];
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LPBYTE value;
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DWORD size = 0, rc;
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RegOpenKey(HKEY_LOCAL_MACHINE,
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"HARDWARE\\DESCRIPTION\\System\\CentralProcessor", &key);
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//just lookup the first id, then assume all cpus are the same.
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rc = RegEnumKey(key, 0, id, sizeof(id));
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if (rc != ERROR_SUCCESS) {
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return rc;
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}
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rc = RegOpenKey(key, id, &cpu);
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if (rc != ERROR_SUCCESS) {
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return rc;
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}
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size = sizeof(info->vendor);
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if (RegQueryValueEx(cpu, "VendorIdentifier", NULL, NULL,
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(LPVOID)&info->vendor, &size) ||
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strEQ(info->vendor, "GenuineIntel"))
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{
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SIGAR_SSTRCPY(info->vendor, "Intel");
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}
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else {
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if (strEQ(info->vendor, "AuthenticAMD")) {
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SIGAR_SSTRCPY(info->vendor, "AMD");
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}
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}
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size = sizeof(info->model);
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if (RegQueryValueEx(cpu, "ProcessorNameString", NULL, NULL,
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(LPVOID)&info->model, &size))
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{
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size = sizeof(info->model);
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if (RegQueryValueEx(cpu, "Identifier", NULL, NULL,
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(LPVOID)&info->model, &size))
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{
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SIGAR_SSTRCPY(info->model, "x86");
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}
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}
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else {
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sigar_cpu_model_adjust(sigar, info);
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}
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size = sizeof(info->mhz); // == sizeof(DWORD)
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if (RegQueryValueEx(cpu, "~MHz", NULL, NULL,
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(LPVOID)&info->mhz, &size))
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{
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info->mhz = -1;
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}
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info->cache_size = -1; //XXX
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return SIGAR_OK;
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}
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#ifdef CPU_MAIN
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void main(void)
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{
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// Number of logical CPU per ONE PHYSICAL CPU
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unsigned char LogicalNum = 0,
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PhysicalNum = 0, // Total number of physical processor
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HTStatusFlag = 0;
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sigar_cpu_info_t info;
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sigar_cpu_info_get(NULL, &info);
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printf("Vendor............%s\n", info.vendor);
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printf("Model.............%s\n", info.model);
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printf("Mhz...............%d\n", info.mhz);
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HTStatusFlag = CPUCount(&LogicalNum, &PhysicalNum);
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switch(HTStatusFlag)
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{
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case HT_NOT_CAPABLE:
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printf("Hyper-threading...not capable\n");
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break;
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case HT_DISABLED:
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printf("Hyper-threading...disabled\n");
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break;
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case HT_ENABLED:
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printf("Hyper-threading...enabled\n");
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break;
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case HT_SUPPORTED_NOT_ENABLED:
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printf("Hyper-threading...capable but not enabled\n");
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break;
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case HT_CANNOT_DETECT:
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printf("Hyper-threading...cannot be detected\n");
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break;
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}
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printf("Logical ratio.....%d/1\n",
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LogicalNum);
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if (PhysicalNum != (unsigned char)-1) {
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printf("Physical CPUs.....%d\n", PhysicalNum);
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}
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else {
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printf("Can't determine number of physical processors\n");
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printf("Make sure to enable ALL processors\n");
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}
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}
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#endif
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